OSVVM Verification Component Library

OSVVM Verification Component Library

OSVVM’s growing verification component library is tabulated below.

Verification Component(s)

User Guide

Source

Repository

Axi4 Full (Manager, Memory, and Subordinate) VCs

UG

Axi4

AXI4

Axi4 Lite (Manager, Memory, and Subordinate) VCs

UG

Axi4Lite

AXI4

AxiStream Transmitter and Receiver VCs

UG

AxiStream

AXI4

UART Transmitter and Receiver VCs

None

UART

UART

DpRam behavioral model and DpRam controller

None

DpRam

DpRam

Note all of the OSVVM verification components use the model independent transaction interfaces which are defined in OSVVM-Common. It is required to be in the directory OsvvmLibraries/Common.