| Available Reports |
|---|
| Alert Report |
| ScoreboardPkg_slv Report(s) |
| Link to Simulation Results |
| TbUart_Checkers2.txt |
| OsvvmLibraries_RunAllTestsWithCoverage Build Summary |
TbUart_Checkers2 Alert Report
TbUart_Checkers2 Alert Settings
| Setting | Value | Description | |
|---|---|---|---|
| FailOnWarning | true | If true, warnings are a test error | |
| FailOnDisabledErrors | true | If true, Disabled Alert Counts are a test error | |
| FailOnRequirementErrors | true | If true, Requirements Errors are a test error | |
| External | Failures | 0 | Added to Alert Counts in determine total errors |
| Errors | 0 | ||
| Warnings | 0 | ||
| Expected | Failures | 0 | Subtracted from Alert Counts in determine total errors |
| Errors | 15 | ||
| Warnings | 0 | ||
TbUart_Checkers2 Alert Results
| Name | Status | Checks | Requirements | Alert Counts | Disabled Alert Counts | |||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Total | Passed | Failed | Goal | Passed | Failures | Errors | Warnings | Failures | Errors | Warnings | ||
| TbUart_Checkers2 | PASSED | 26 | 11 | 0 | 0 | 0 | 0 | 15 | 0 | 0 | 0 | 0 |
| Default | PASSED | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| OSVVM | PASSED | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| UART_SB1 | PASSED | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| uarttx_1 | PASSED | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| uartrx_1 | FAILED | 17 | 2 | 15 | 0 | 0 | 0 | 15 | 0 | 0 | 0 | 0 |
| UartTxProc | PASSED | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| TB UartRxProc | PASSED | 6 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
TbUart_Checkers2 Scoreboard Report for Scoreboard_slv
| Name | ParentName | ItemCount | ErrorCount | ItemsChecked | ItemsPopped | ItemsDropped | FifoCount |
|---|---|---|---|---|---|---|---|
| TransmitFifo | uarttx_1 | 17 | 0 | 0 | 17 | 0 | 0 |
| ReceiveFifo | uartrx_1 | 17 | 0 | 0 | 17 | 0 | 0 |