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TbAxi4_ManagerMemoryRandomTiming1 Alert Report
TbAxi4_ManagerMemoryRandomTiming1 Alert Settings
Setting | Value | Description | |
---|---|---|---|
FailOnWarning | true | If true, warnings are a test error | |
FailOnDisabledErrors | true | If true, Disabled Alert Counts are a test error | |
FailOnRequirementErrors | true | If true, Requirements Errors are a test error | |
External | Failures | 0 | Added to Alert Counts in determine total errors |
Errors | 0 | ||
Warnings | 0 | ||
Expected | Failures | 0 | Subtracted from Alert Counts in determine total errors |
Errors | 0 | ||
Warnings | 0 |
TbAxi4_ManagerMemoryRandomTiming1 Alert Results
Name | Status | Checks | Requirements | Alert Counts | Disabled Alert Counts | |||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|
Total | Passed | Failed | Goal | Passed | Failures | Errors | Warnings | Failures | Errors | Warnings | ||
TbAxi4_ManagerMemoryRandomTiming1 | PASSED | 192 | 192 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Default | PASSED | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
OSVVM | PASSED | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
subordinate_1 | PASSED | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
:tbaxi4memory:subordinate_1::memory | PASSED | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No response | PASSED | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Data Check | PASSED | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
manager_1 | PASSED | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Protocol Error | PASSED | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Data Check | PASSED | 64 | 64 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No response | PASSED | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
WriteResponse Scoreboard | PASSED | 64 | 64 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
ReadResponse Scoreboard | PASSED | 64 | 64 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
TbAxi4_ManagerMemoryRandomTiming1 Coverage Report
Total Coverage: 100.00
WriteAddressDelayCov BurstLength Coverage Model Coverage: 100.0
WriteAddressDelayCov BurstLength Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 1328346495, 227425816 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
WriteAddressDelayCov BurstLength Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 2 to 4 | 11 | 1 | 1100.0 | |
Total Percent Coverage: 100.0 |
WriteAddressDelayCov BurstDelay Coverage Model Coverage: 100.0
WriteAddressDelayCov BurstDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 1127213863, 1056188324 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
WriteAddressDelayCov BurstDelay Coverage Bins
Name | Type | Bin1 | Bin2 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|---|
COUNT | 0 to 1 | 2 to 5 | 16 | 1 | 1600.0 | |
Total Percent Coverage: 100.0 |
WriteAddressDelayCov BeatDelay Coverage Model Coverage: 100.0
WriteAddressDelayCov BeatDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 1415779446, 533209976 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
WriteAddressDelayCov BeatDelay Coverage Bins
Name | Type | Bin1 | Bin2 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|---|
COUNT | 0 | 0 | 49 | 1 | 4900.0 | |
Total Percent Coverage: 100.0 |
WriteDataDelayCov BurstLength Coverage Model Coverage: 100.0
WriteDataDelayCov BurstLength Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 1940938255, 146166213 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
WriteDataDelayCov BurstLength Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 2 to 10 | 10 | 1 | 1000.0 | |
Total Percent Coverage: 100.0 |
WriteDataDelayCov BurstDelay Coverage Model Coverage: 100.0
WriteDataDelayCov BurstDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 304769326, 127617166 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
WriteDataDelayCov BurstDelay Coverage Bins
Name | Type | Bin1 | Bin2 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|---|
COUNT | 0 to 1 | 2 to 5 | 10 | 1 | 1000.0 | |
Total Percent Coverage: 100.0 |
WriteDataDelayCov BeatDelay Coverage Model Coverage: 100.0
WriteDataDelayCov BeatDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 1108661963, 1815981325 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
WriteDataDelayCov BeatDelay Coverage Bins
Name | Type | Bin1 | Bin2 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|---|
COUNT | 0 | 0 | 55 | 1 | 5500.0 | |
Total Percent Coverage: 100.0 |
WriteResponseDelayCov BurstLength Coverage Model Coverage: 100.0
WriteResponseDelayCov BurstLength Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 230083212, 1956492028 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
WriteResponseDelayCov BurstLength Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 2 to 10 | 10 | 1 | 1000.0 | |
Total Percent Coverage: 100.0 |
WriteResponseDelayCov BurstDelay Coverage Model Coverage: 100.0
WriteResponseDelayCov BurstDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 131230074, 883351094 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
WriteResponseDelayCov BurstDelay Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 2 to 5 | 10 | 1 | 1000.0 | |
Total Percent Coverage: 100.0 |
WriteResponseDelayCov BeatDelay Coverage Model Coverage: 100.0
WriteResponseDelayCov BeatDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 654738306, 205275102 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
WriteResponseDelayCov BeatDelay Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 0 | 54 | 1 | 5400.0 | |
Total Percent Coverage: 100.0 |
ReadAddressDelayCov BurstLength Coverage Model Coverage: 100.0
ReadAddressDelayCov BurstLength Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 1328346495, 1485208726 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
ReadAddressDelayCov BurstLength Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 2 to 4 | 10 | 1 | 1000.0 | |
Total Percent Coverage: 100.0 |
ReadAddressDelayCov BurstDelay Coverage Model Coverage: 100.0
ReadAddressDelayCov BurstDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 1411950811, 980750969 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
ReadAddressDelayCov BurstDelay Coverage Bins
Name | Type | Bin1 | Bin2 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|---|
COUNT | 0 to 1 | 2 to 5 | 16 | 1 | 1600.0 | |
Total Percent Coverage: 100.0 |
ReadAddressDelayCov BeatDelay Coverage Model Coverage: 100.0
ReadAddressDelayCov BeatDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 1415779446, 1852023033 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
ReadAddressDelayCov BeatDelay Coverage Bins
Name | Type | Bin1 | Bin2 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|---|
COUNT | 0 | 0 | 49 | 1 | 4900.0 | |
Total Percent Coverage: 100.0 |
ReadDataDelayCov BurstLength Coverage Model Coverage: 100.0
ReadDataDelayCov BurstLength Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 888616220, 1037845501 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
ReadDataDelayCov BurstLength Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 2 to 10 | 11 | 1 | 1100.0 | |
Total Percent Coverage: 100.0 |
ReadDataDelayCov BurstDelay Coverage Model Coverage: 100.0
ReadDataDelayCov BurstDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 1288130563, 1339055550 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
ReadDataDelayCov BurstDelay Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 2 to 5 | 11 | 1 | 1100.0 | |
Total Percent Coverage: 100.0 |
ReadDataDelayCov BeatDelay Coverage Model Coverage: 100.0
ReadDataDelayCov BeatDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 792763958, 2039602757 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
ReadDataDelayCov BeatDelay Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 0 | 53 | 1 | 5300.0 | |
Total Percent Coverage: 100.0 |
WriteAddressDelayCov BurstLength Coverage Model Coverage: 100.0
WriteAddressDelayCov BurstLength Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 1116211783, 346156584 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
WriteAddressDelayCov BurstLength Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 2 to 4 | 10 | 1 | 1000.0 | |
Total Percent Coverage: 100.0 |
WriteAddressDelayCov BurstDelay Coverage Model Coverage: 100.0
WriteAddressDelayCov BurstDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 247092808, 678586193 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
WriteAddressDelayCov BurstDelay Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 2 to 5 | 15 | 1 | 1500.0 | |
Total Percent Coverage: 100.0 |
WriteAddressDelayCov BeatDelay Coverage Model Coverage: 100.0
WriteAddressDelayCov BeatDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 1596920273, 1400583220 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
WriteAddressDelayCov BeatDelay Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 0 | 49 | 1 | 4900.0 | |
Total Percent Coverage: 100.0 |
WriteDataDelayCov BurstLength Coverage Model Coverage: 100.0
WriteDataDelayCov BurstLength Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 2045183118, 1524810434 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
WriteDataDelayCov BurstLength Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 2 to 10 | 12 | 1 | 1200.0 | |
Total Percent Coverage: 100.0 |
WriteDataDelayCov BurstDelay Coverage Model Coverage: 100.0
WriteDataDelayCov BurstDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 156570096, 2088570153 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
WriteDataDelayCov BurstDelay Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 2 to 5 | 12 | 1 | 1200.0 | |
Total Percent Coverage: 100.0 |
WriteDataDelayCov BeatDelay Coverage Model Coverage: 100.0
WriteDataDelayCov BeatDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 1450994117, 317236609 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
WriteDataDelayCov BeatDelay Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 0 | 52 | 1 | 5200.0 | |
Total Percent Coverage: 100.0 |
WriteResponseDelayCov BurstLength Coverage Model Coverage: 0.0
WriteResponseDelayCov BurstLength Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 1935614252, 1231610140 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 0 |
TotalCovGoal | 1 |
WriteResponseDelayCov BurstLength Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 2 to 10 | 0 | 1 | 0.0 | |
Total Percent Coverage: 0.0 |
WriteResponseDelayCov BurstDelay Coverage Model Coverage: 0.0
WriteResponseDelayCov BurstDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 628491352, 1519532790 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 0 |
TotalCovGoal | 1 |
WriteResponseDelayCov BurstDelay Coverage Bins
Name | Type | Bin1 | Bin2 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|---|
COUNT | 0 to 1 | 2 to 5 | 0 | 1 | 0.0 | |
Total Percent Coverage: 0.0 |
WriteResponseDelayCov BeatDelay Coverage Model Coverage: 0.0
WriteResponseDelayCov BeatDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 1682240380, 1538165535 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 0 |
TotalCovGoal | 1 |
WriteResponseDelayCov BeatDelay Coverage Bins
Name | Type | Bin1 | Bin2 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|---|
COUNT | 0 | 0 | 0 | 1 | 0.0 | |
Total Percent Coverage: 0.0 |
ReadAddressDelayCov BurstLength Coverage Model Coverage: 100.0
ReadAddressDelayCov BurstLength Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 1116211783, 1318527028 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
ReadAddressDelayCov BurstLength Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 2 to 4 | 11 | 1 | 1100.0 | |
Total Percent Coverage: 100.0 |
ReadAddressDelayCov BurstDelay Coverage Model Coverage: 100.0
ReadAddressDelayCov BurstDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 1121918263, 1928508134 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
ReadAddressDelayCov BurstDelay Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 2 to 5 | 15 | 1 | 1500.0 | |
Total Percent Coverage: 100.0 |
ReadAddressDelayCov BeatDelay Coverage Model Coverage: 100.0
ReadAddressDelayCov BeatDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 1596920273, 1195528402 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
ReadAddressDelayCov BeatDelay Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 0 | 49 | 1 | 4900.0 | |
Total Percent Coverage: 100.0 |
ReadDataDelayCov BurstLength Coverage Model Coverage: 100.0
ReadDataDelayCov BurstLength Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 773296567, 965719208 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
ReadDataDelayCov BurstLength Coverage Bins
Name | Type | Bin1 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|
COUNT | 2 to 10 | 20 | 1 | 2000.0 | |
Total Percent Coverage: 100.0 |
ReadDataDelayCov BurstDelay Coverage Model Coverage: 100.0
ReadDataDelayCov BurstDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 1970173257, 1644253033 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
ReadDataDelayCov BurstDelay Coverage Bins
Name | Type | Bin1 | Bin2 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|---|
COUNT | 0 to 1 | 2 to 5 | 20 | 1 | 2000.0 | |
Total Percent Coverage: 100.0 |
ReadDataDelayCov BeatDelay Coverage Model Coverage: 100.0
ReadDataDelayCov BeatDelay Coverage Settings
Settings | Value |
---|---|
CovWeight | 0 |
Goal | 100.0 |
WeightMode | REMAIN |
Seeds | 1051476032, 738233172 |
CountMode | COUNT_FIRST |
IllegalMode | ILLEGAL_ON |
Threshold | 45.0 |
ThresholdEnable | FALSE |
TotalCovCount | 1 |
TotalCovGoal | 1 |
ReadDataDelayCov BeatDelay Coverage Bins
Name | Type | Bin1 | Bin2 | Count | AtLeast | Percent Coverage |
---|---|---|---|---|---|---|
COUNT | 0 | 0 | 108 | 1 | 10800.0 | |
Total Percent Coverage: 100.0 |
TbAxi4_ManagerMemoryRandomTiming1 Scoreboard Report for Scoreboard_slv
Name | ParentName | ItemCount | ErrorCount | ItemsChecked | ItemsPopped | ItemsDropped | FifoCount |
---|---|---|---|---|---|---|---|
WriteAddressFIFO | subordinate_1 | 64 | 0 | 0 | 64 | 0 | 0 |
WriteDataFifo | subordinate_1 | 64 | 0 | 0 | 64 | 0 | 0 |
WriteResponseFifo | subordinate_1 | 64 | 0 | 0 | 64 | 0 | 0 |
ReadAddressFifo | subordinate_1 | 64 | 0 | 0 | 64 | 0 | 0 |
ReadDataFifo | subordinate_1 | 64 | 0 | 0 | 64 | 0 | 0 |
WriteResponse Scoreboard | manager_1 | 64 | 0 | 64 | 64 | 0 | 0 |
ReadResponse Scoreboard | manager_1 | 64 | 0 | 64 | 64 | 0 | 0 |
WriteAddressFIFO | manager_1 | 64 | 0 | 0 | 64 | 0 | 0 |
WriteDataFifo | manager_1 | 64 | 0 | 0 | 64 | 0 | 0 |
ReadAddressFifo | manager_1 | 64 | 0 | 0 | 64 | 0 | 0 |
ReadAddressTransactionFifo | manager_1 | 64 | 0 | 0 | 64 | 0 | 0 |
ReadDataFifo | manager_1 | 64 | 0 | 0 | 64 | 0 | 0 |