Debugging
By default, OSVVMOpen Source VHDL Verification Methodology scripts are set up to run regressions fast. Debugging information, logged signals and waveforms slow simulations down, so they are off. And if a simulation fails, the build goes on with the next one.
All settings below are booleans: true or false. Called without an argument, a Set* command means true.
Debug Mode
SetDebugMode adds the simulator’s debugging options to analyze and simulate,
so signals and variables can be inspected. The default is false. GetDebugMode returns the
setting.
SetDebugMode true
Logging Signal Values
SetLogSignals logs the values of signals during the simulation, so they can be displayed in the
simulator’s waveform viewer after it finished. The default is false. GetLogSignals returns
the setting.
For GHDLG Hardware Design Language and NVC, which have no waveform viewer, see Saving Waveforms with GHDL and NVC.
SetLogSignals true
Stop on Errors
Interactive Mode
SetInteractiveMode does all of the above in one step:
the error stop counts become
1; switching back restores their previous values;debug mode and signal logging follow the interactive mode, unless SetDebugMode or SetLogSignals set them explicitly.
In interactive mode, a build doesn’t exit the simulator even if the setting ExitOnBuildDone is true, and
with the setting OpenBuildHtmlFile it opens the build report when it finishes.
GetInteractiveMode returns the setting.
SetInteractiveMode
build ../RunExample.pro
SetInteractiveMode false
See also
- Settings Files
To change OSVVM’s defaults for all builds, set them in the settings files.
- Scripts that Run with Each Simulation
Scripts that run automatically with every simulation, for example to display waveforms.